LT1054CDW >
LT1054CDW
Texas Instruments
IC REG CHARG PUMP INV 16SOIC
1556 Pcs New Original In Stock
Charge Pump Switching Regulator IC Positive or Negative Adjustable (Fixed) 3.5V (-Vin, 2Vin) 1 Output 100mA 16-SOIC (0.295", 7.50mm Width)
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LT1054CDW Texas Instruments
5.0 / 5.0 - (488 Ratings)

LT1054CDW

Product Overview

1283664

DiGi Electronics Part Number

LT1054CDW-DG

Manufacturer

Texas Instruments
LT1054CDW

Description

IC REG CHARG PUMP INV 16SOIC

Inventory

1556 Pcs New Original In Stock
Charge Pump Switching Regulator IC Positive or Negative Adjustable (Fixed) 3.5V (-Vin, 2Vin) 1 Output 100mA 16-SOIC (0.295", 7.50mm Width)
Quantity
Minimum 1

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In Stock (All prices are in USD)
  • QTY Target Price Total Price
  • 1 1.8383 1.8383
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LT1054CDW Technical Specifications

Category Power Management (PMIC), Voltage Regulators - DC DC Switching Regulators

Manufacturer Texas Instruments

Packaging Tube

Series -

Product Status Active

Function Ratiometric, Step-Up

Output Configuration Positive or Negative

Topology Charge Pump

Output Type Adjustable (Fixed)

Number of Outputs 1

Voltage - Input (Min) 3.5V

Voltage - Input (Max) 15V

Voltage - Output (Min/Fixed) 3.5V (-Vin, 2Vin)

Voltage - Output (Max) 26.4V

Current - Output 100mA

Frequency - Switching 25kHz

Synchronous Rectifier No

Operating Temperature 0°C ~ 70°C (TA)

Mounting Type Surface Mount

Package / Case 16-SOIC (0.295", 7.50mm Width)

Supplier Device Package 16-SOIC

Base Product Number LT1054

Datasheet & Documents

HTML Datasheet

LT1054CDW-DG

Environmental & Export Classification

RoHS Status ROHS3 Compliant
Moisture Sensitivity Level (MSL) 1 (Unlimited)
REACH Status REACH Unaffected
ECCN EAR99
HTSUS 8542.39.0001

Additional Information

Other Names
2156-LT1054CDW
LT1054CDWE4-DG
-LT1054CDW-NDR
LT1054CDWE4
TEXTISLT1054CDW
-296-9590-5-DG
296-9590-5
-296-9590-5
Standard Package
40

Alternative Parts

PART NUMBER
MANUFACTURER
QUANTITY AVAILABLE
DiGi PART NUMBER
UNIT PRICE
SUBSTITUTE TYPE
LT1054CSW#TRPBF
Analog Devices Inc.
851
LT1054CSW#TRPBF-DG
0.0184
Direct
LT1054CDWG4
Texas Instruments
1132
LT1054CDWG4-DG
0.0184
MFR Recommended
LT1054ISW#TRPBF
Analog Devices Inc.
2246
LT1054ISW#TRPBF-DG
0.0184
Direct

Reviews

5.0/5.0-(Show up to 5 Ratings)
書***者
de desembre 02, 2025
5.0
包裝設計簡潔又環保,拆開來也很有趣,感受到品牌的用心。
Infini***ourney
de desembre 02, 2025
5.0
The after-sales team followed up to ensure my satisfaction, reflecting their commitment to customer care.
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de desembre 02, 2025
5.0
DiGi Electronics' website is a model of simplicity, and their prices are very attractive.
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de desembre 02, 2025
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Their commitment to punctuality makes my supply chain management much easier.
Drea***tcher
de desembre 02, 2025
5.0
Affordable prices and unwavering quality are what I love most about shopping here.
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Frequently Asked Questions (FAQ)

What are the key design-in risks when using the LT1054CDW in a noise-sensitive analog circuit, and how can they be mitigated?

The LT1054CDW uses a 25kHz charge pump switching frequency without synchronous rectification, which can introduce low-frequency ripple and noise into sensitive analog systems. In precision signal chains or mixed-signal designs, this can degrade performance. To mitigate this, place the LT1054CDW on a separate power domain with ferrite beads and LC filtering on both input and output. Use high-quality, low-ESR ceramic capacitors (e.g., 10µF X7R) close to pins 1 (C1+) and 4 (C1–). Keep high-current switching loops small, and avoid routing sensitive analog traces near the inductorless charge pump path. Consider post-regulation with an LDO like the TPS7A4700 if ultra-low noise is required.

Can the LT1054CDW replace the MAX660 or ICL7660 in an existing ±5V rail design, and what are the critical differences to watch for?

Yes, the LT1054CDW can replace the MAX660 or ICL7660 in dual-rail generation, but with important trade-offs. Unlike the MAX660 (which operates down to 1.5V input), the LT1054CDW requires a minimum 3.5V input, limiting low-voltage portability. However, it supports input up to 15V and can generate higher output voltages (up to -15V or +30V when boosting), making it better suited for industrial applications. The LT1054CDW also has a higher 100mA output current capability vs. the MAX660’s 20mA, improving load drive. Be sure to revalidate capacitor sizing and transient response, as the larger output current can increase inrush if not current-limited.

How does the non-synchronous design of the LT1054CDW impact efficiency and thermal performance under continuous 100mA load?

The LT1054CDW’s non-synchronous rectification relies on internal diodes instead of active FETs, resulting in higher conduction losses—especially at higher load currents. Under continuous 100mA loads, expect efficiency drops to 65–75% depending on VIN and VOUT configuration. This leads to increased internal power dissipation, so designers must verify thermal performance on their PCB. With θJA ~ 160°C/W (SOIC-16), a sustained 100mA inverted output at VIN=12V may raise junction temperature by over 60°C above ambient. Use ample copper pour for thermal dissipation and consider pulsed operation or derating above 50°C ambient.

What are the reliability concerns when operating the LT1054CDW near its 70°C maximum ambient temperature rating in an enclosed industrial enclosure?

Operating the LT1054CDW near its 70°C TA limit in enclosed systems risks exceeding safe junction temperature due to self-heating and poor airflow. With internal switching losses and no on-chip thermal shutdown, long-term reliability may degrade via electromigration or oxide stress. To ensure longevity, derate current above 50°C ambient, ensure ≥1.5mm clearance around the 16-SOIC package for convection, and monitor TJ using conservative estimates. Prefer conformal coating and humidity-resistant designs in harsh environments, as the MSL-1 rating allows indefinite exposure but doesn’t prevent field-level moisture ingress in non-hermetic enclosures.

When using the LT1054CDW for voltage inversion (VOUT = -VIN), how should the output capacitor be selected to maintain regulation under dynamic loads?

For stable negative voltage generation with the LT1054CDW in inverting mode, the output capacitor must handle charge pump ripple current and respond to load transients. Use a minimum 10µF low-ESR ceramic capacitor (X7R or X5R) at the output (pin 8). Avoid using tantalum capacitors due to potential failure under reverse ripple current. For dynamic loads exceeding 10mA step changes, parallel the ceramic cap with a 22µF electrolytic to reduce output sag. Ensure capacitor voltage rating exceeds the worst-case |VOUT| by at least 25%—e.g., use a 25V cap for a -15V output—to prevent breakdown during startup or load dump.

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