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ISO721DRG4
Texas Instruments
DGTL ISO 2500VRMS 1CH GP 8SOIC
500194 Pcs New Original In Stock
General Purpose Digital Isolator 2500Vrms 1 Channel 100Mbps 25kV/µs CMTI 8-SOIC (0.154", 3.90mm Width)
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ISO721DRG4
Product Overview
1332929
DiGi Electronics Part Number
ISO721DRG4-DGManufacturer
Texas Instruments
ISO721DRG4
Description
DGTL ISO 2500VRMS 1CH GP 8SOICInventory
500194 Pcs New Original In Stock
General Purpose Digital Isolator 2500Vrms 1 Channel 100Mbps 25kV/µs CMTI 8-SOIC (0.154", 3.90mm Width)
Quantity
Minimum 1
Minimum 1
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ISO721DRG4 Technical Specifications
Category
Digital Isolators
Packaging
-
Series
-
Product Status
Discontinued at Digi-Key
Technology
Capacitive Coupling
Type
General Purpose
Isolated Power
No
Number of Channels
1
Inputs - Side 1/Side 2
1/0
Channel Type
Unidirectional
Voltage - Isolation
2500Vrms
Common Mode Transient Immunity (Min)
25kV/µs
Data Rate
100Mbps
Propagation Delay tpLH / tpHL (Max)
24ns, 24ns
Pulse Width Distortion (Max)
2ns
Rise / Fall Time (Typ)
1ns, 1ns
Voltage - Supply
3V ~ 5.5V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Supplier Device Package
8-SOIC
Base Product Number
ISO721
Datasheet & Documents
Manufacturer Product Page
ISO721DRG4 Specifications
HTML Datasheet
ISO721DRG4-DG
Environmental & Export Classification
RoHS Status
ROHS3 Compliant
Moisture Sensitivity Level (MSL)
1 (Unlimited)
REACH Status
REACH Unaffected
ECCN
EAR99
HTSUS
8542.39.0001
Additional Information
Standard Package
2,500
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Frequently Asked Questions (FAQ)
When designing a 100Mbps isolated SPI interface with the ISO721DRG4, how do I manage signal integrity and race conditions given its 24ns propagation delay and 2ns pulse width distortion?
For ISO721DRG4 in high-speed SPI designs, the 24ns max propagation delay (tpLH/tpHL) combined with 2ns pulse width distortion creates a critical timing budget. Since the ISO721DRG4 is unidirectional (1/0 channel configuration), you must account for the round-trip delay when using it on the clock line (SCLK). For a 100Mbps data rate (50MHz clock), the 24ns delay represents 1.2 clock cycles of skew. Use the device on SCLK only with a matched delay on MOSI/MISO to maintain setup/hold times. For bidirectional data lines like MISO in a master-slave topology, consider using two ISO721DRG4 units back-to-back or switch to a bidirectional isolator like ISO7221. The 25kV/µs CMTI ensures robust operation in motor drive environments, but keep PCB trace lengths equal to within 2mm to avoid skew beyond the 2ns pulse width distortion limit.
With the ISO721DRG4 discontinued, what is the safest replacement from the substitute list (SI8610BB-B-IS, ISO722DR) that maintains 100Mbps performance and 2500Vrms isolation without redesigning my 3.3V power supply?
The ISO722DR is the most direct drop-in replacement for ISO721DRG4 when operating at 3.3V. Both share identical pinout (8-SOIC), 2500Vrms isolation, 100Mbps data rate, and 25kV/µs CMTI. Critical difference: ISO722DR has 3ns max pulse width distortion (vs. 2ns in ISO721DRG4), so verify timing margins for your application. The SI8610BB-B-IS offers 150Mbps capability but requires careful VDD sequencing as it lacks the ISO721DRG4's 3V-5.5V wide supply range—it's optimized for 3.75V minimum. If using SI8610BB-B-IS, add a 3.3V LDO with 5% tolerance. For designs originally using ISO721DRG4 at 5V, ISO722DR maintains full compatibility; at 3.3V, both work but ISO722DR's propagation delay increases to 28ns typical—re-evaluate high-speed timing.
How does the ISO721DRG4's capacitive coupling technology handle common-mode transients in 48V automotive battery monitoring systems, and what external components are needed to survive ISO 7637-2 pulses?
The ISO721DRG4's 25kV/µs minimum CMTI (common-mode transient immunity) is sufficient for 48V automotive systems where typical dV/dt from MOSFET switching is 5-15kV/µs. However, the device lacks isolated power (Isolated Power: No), requiring external power isolation. For ISO 7637-2 pulse 1 (-150V) and pulse 2a (+112V) protection, add a bidirectional TVS diode (e.g., SMBJ24CA) between VDD and GND on the field side, plus a series resistor (10Ω-22Ω) to limit current into the ISO721DRG4's input. The capacitive coupling structure inherently rejects fast transients better than magnetic isolators, but for Class 5 pulses (up to ±600V), use an external common-mode choke (Würth 744232261) in series with the power and signal lines. Place a 0.1µF ceramic capacitor within 2mm of each VDD pin to maintain the 25kV/µs transient immunity spec.
When using ISO721DRG4 in a 5V to 3.3V level-shifting isolated UART, what are the risks of power supply sequencing and how can I prevent latch-up during power-on?
The ISO721DRG4 supports 3V to 5.5V on both sides independently, enabling 5V-to-3.3V level-shifting without external translators. However, the device does not have power-on reset (POR) sequencing protection—if side 1 (VDD1) powers up before side 2 (VDD2) by more than 500µs, output may be undefined during ramp-up. To prevent latch-up or indeterminate states, use a power sequencer (e.g., TPS3808) to ensure both supplies reach 90% of nominal within 200µs of each other. Alternatively, add a 10kΩ pull-down on the output side to define state during startup. The ISO721DRG4's unidirectional channel (1/0) means the input side (pin 2) must never exceed VDD1 + 0.3V; otherwise, internal ESD diodes can forward-bias and cause excessive current draw. For hot-swap applications, add a 330Ω series resistor on the input to limit current during supply ramp transients.
How does the ISO721DRG4's 2500Vrms isolation and 8-SOIC package impact PCB creepage and clearance for 250V AC mains sensing applications, and what layout changes are needed for reinforced insulation?
While ISO721DRG4 provides 2500Vrms withstand voltage (basic isolation per VDE 0884-10), the 8-SOIC package has only 4.0mm minimum creepage between pins on opposite sides, insufficient for 250V AC reinforced insulation (which requires 8mm for pollution degree 2). For mains voltage sensing (250V AC), you must either: 1) Use the device only for basic isolation with a 4mm air gap on PCB and encapsulate with conformal coating to reduce pollution degree to 1, or 2) Substitute with ISO721M (the wide-body SOIC-16 version) which offers 8mm creepage for reinforced insulation. If staying with ISO721DRG4, route a 2.5mm-wide isolation slot under the device, increase clearance to 5mm on both sides, and use 1206-rated resistors on primary side to limit fault current. The 25kV/µs CMTI remains valid only if you maintain <2pF parasitic capacitance across the isolation barrier—avoid routing any traces within 3mm of the device's center line on inner layers.
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