DS90UB948TNKDRQ1 >
DS90UB948TNKDRQ1
Texas Instruments
IC SER/DESER 25-170 MHZ FPD 64WQ
19423 Pcs New Original In Stock
3.36Gbps Deserializer 2 Input 8 Output 64-WQFN (9x9)
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DS90UB948TNKDRQ1 Texas Instruments
5.0 / 5.0 - (210 Ratings)

DS90UB948TNKDRQ1

Product Overview

1303450

DiGi Electronics Part Number

DS90UB948TNKDRQ1-DG

Manufacturer

Texas Instruments
DS90UB948TNKDRQ1

Description

IC SER/DESER 25-170 MHZ FPD 64WQ

Inventory

19423 Pcs New Original In Stock
3.36Gbps Deserializer 2 Input 8 Output 64-WQFN (9x9)
Quantity
Minimum 1

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In Stock (All prices are in USD)
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  • 1 4.5250 4.5250
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DS90UB948TNKDRQ1 Technical Specifications

Category Interface, Serializers, Deserializers

Manufacturer Texas Instruments

Packaging Cut Tape (CT) & Digi-Reel®

Series -

Product Status Active

Function Deserializer

Data Rate 3.36Gbps

Input Type FPD-Link III, LVDS

Output Type LVDS

Number of Inputs 2

Number of Outputs 8

Voltage - Supply 1.71V ~ 1.89V, 3V ~ 3.6V

Operating Temperature -40°C ~ 105°C (TA)

Grade Automotive

Qualification AEC-Q100

Mounting Type Surface Mount

Package / Case 64-WFQFN Exposed Pad

Supplier Device Package 64-WQFN (9x9)

Base Product Number DS90UB948

Datasheet & Documents

Manufacturer Product Page

DS90UB948TNKDRQ1 Specifications

HTML Datasheet

DS90UB948TNKDRQ1-DG

Environmental & Export Classification

RoHS Status ROHS3 Compliant
Moisture Sensitivity Level (MSL) 3 (168 Hours)
REACH Status REACH Unaffected
ECCN EAR99
HTSUS 8542.39.0001

Additional Information

Other Names
-296-44014-1
-296-44014-1-DG
DS90UB948TNKDRQ1-DG
296-44014-6
296-44014-1
296-44014-2
Standard Package
2,000

Reviews

5.0/5.0-(Show up to 5 Ratings)
Dou***ves
de desembre 02, 2025
5.0
Je suis rassuré par la durabilité des produits, qui résistent à l’épreuve du temps et de l’usage.
Hope***Heart
de desembre 02, 2025
5.0
I've never been disappointed with the quality of DiGi Electronics' offerings.
Brig***ista
de desembre 02, 2025
5.0
I’ve had great experiences with their products’ durability, even after numerous testing cycles.
Mo***low
de desembre 02, 2025
5.0
Effective inventory control means minimal stockouts and consistent product availability.
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Frequently Asked Questions (FAQ)

Can the DS90UB948TNKDRQ1 be used to replace a Maxim MAX9286 in an automotive camera system design without major firmware changes?

The DS90UB948TNKDRQ1 and Maxim MAX9286 are both FPD-Link III deserializers, but they are not pin-for-pin or register-compatible. While both support 4-channel LVDS output and similar data rates, the DS90UB948TNKDRQ1 requires different initialization sequences, I2C register mapping, and power sequencing. A firmware rewrite is typically necessary, and careful validation of the forward-channel clocking and back-channel control is required. TI provides reference firmware and configuration tools (such as TIDA-01575) that can accelerate migration, but full system-level testing under automotive temperature and EMI conditions is strongly recommended before deployment.

What are the key reliability risks when using the DS90UB948TNKDRQ1 in a high-vibration automotive environment, and how can PCB layout mitigate them?

The DS90UB948TNKDRQ1’s 64-WQFN exposed pad package is susceptible to solder joint fatigue under prolonged vibration, especially if the thermal pad is not properly stenciled and soldered. To mitigate this, ensure full solder coverage under the exposed pad using a multi-via array connected to a solid ground plane. Avoid routing high-speed signals near board edges or mounting points. Additionally, adhere to TI’s recommended land pattern and use underfill if the application exceeds typical automotive vibration profiles (e.g., engine-mounted cameras). Thermal cycling between -40°C and 105°C also stresses interconnects—using a symmetrical layout and minimizing copper imbalance reduces warpage risk.

How does the DS90UB948TNKDRQ1 handle EMI in a multi-camera ADAS system where multiple deserializers operate simultaneously on the same PCB?

The DS90UB948TNKDRQ1 includes built-in spread-spectrum clocking (SSC) on its LVDS outputs to reduce peak EMI, but simultaneous switching of eight LVDS pairs can still generate significant broadband noise. To minimize interference, stagger the enable times of multiple DS90UB948TNKDRQ1 devices using GPIO-controlled power sequencing, route LVDS traces with strict differential impedance control (100Ω ±10%), and maintain ≥3x trace-width spacing between serializer/deserializer channels. Ground stitching vias around high-speed groups and shielding cans over clusters of deserializers are recommended for CISPR 25 Class 5 compliance in dense ADAS architectures.

Is it safe to operate the DS90UB948TNKDRQ1 at its maximum junction temperature of 125°C in a sealed automotive camera module with limited airflow?

While the DS90UB948TNKDRQ1 is AEC-Q100 qualified for -40°C to 105°C ambient operation, sustained operation near 125°C junction temperature (TJ) significantly reduces long-term reliability due to electromigration and thermal fatigue. In sealed modules, passive cooling via the PCB is critical—ensure the exposed pad is connected to an internal copper pour with multiple thermal vias to a backside ground plane. TI’s thermal resistance (θJA ≈ 30°C/W) indicates that even 0.5W dissipation can raise TJ above 110°C in a 105°C ambient. Use dynamic back-channel disable during idle periods and validate thermal performance with IR imaging during worst-case video streaming scenarios.

Can the DS90UB948TNKDRQ1 support a mixed-resolution setup where one FPD-Link III input carries 1080p60 and the other 720p30 from two different cameras?

Yes, the DS90UB948TNKDRQ1 supports asynchronous dual-input operation, allowing independent video streams on its two FPD-Link III inputs. However, each input must be locked to its own serializer’s clock domain, and the output LVDS channels will reflect the timing of their respective sources. You cannot merge or synchronize the two streams internally—the receiving processor must handle frame buffering and synchronization externally. Ensure both upstream serializers (e.g., DS90UB953-Q1) are configured with compatible back-channel settings, and verify that the total bandwidth per input does not exceed 3.36 Gbps. Mismatched blanking intervals or unstable PCLK signals may cause intermittent lock loss, so robust I2C monitoring and fault recovery logic are advised.

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