24LC64-I/P >
24LC64-I/P
Microchip Technology
IC EEPROM 64KBIT I2C 400KHZ 8DIP
3019 Pcs New Original In Stock
EEPROM Memory IC 64Kbit I2C 400 kHz 900 ns 8-PDIP
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24LC64-I/P Microchip Technology
5.0 / 5.0 - (179 Ratings)

24LC64-I/P

Product Overview

1231464

DiGi Electronics Part Number

24LC64-I/P-DG
24LC64-I/P

Description

IC EEPROM 64KBIT I2C 400KHZ 8DIP

Inventory

3019 Pcs New Original In Stock
EEPROM Memory IC 64Kbit I2C 400 kHz 900 ns 8-PDIP
Memory
Quantity
Minimum 1

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24LC64-I/P Technical Specifications

Category Memory, Memory

Manufacturer Microchip Technology

Packaging Tube

Series -

Product Status Active

DiGi-Electronics Programmable Verified

Memory Type Non-Volatile

Memory Format EEPROM

Technology EEPROM

Memory Size 64Kbit

Memory Organization 8K x 8

Memory Interface I2C

Clock Frequency 400 kHz

Write Cycle Time - Word, Page 5ms

Access Time 900 ns

Voltage - Supply 2.5V ~ 5.5V

Operating Temperature -40°C ~ 85°C (TA)

Mounting Type Through Hole

Package / Case 8-DIP (0.300", 7.62mm)

Supplier Device Package 8-PDIP

Base Product Number 24LC64

Datasheet & Documents

HTML Datasheet

24LC64-I/P-DG

Environmental & Export Classification

RoHS Status ROHS3 Compliant
Moisture Sensitivity Level (MSL) 1 (Unlimited)
REACH Status REACH Unaffected
ECCN EAR99
HTSUS 8542.32.0051

Additional Information

Other Names
24LC64-I/P-NDR
24LC64IP
2266-24LC64-I/P
Standard Package
60

Alternative Parts

PART NUMBER
MANUFACTURER
QUANTITY AVAILABLE
DiGi PART NUMBER
UNIT PRICE
SUBSTITUTE TYPE
AT24C64B-10PU-2.7
Microchip Technology
979
AT24C64B-10PU-2.7-DG
0.0481
MFR Recommended
AT24C64-10PI-2.5
Microchip Technology
1009
AT24C64-10PI-2.5-DG
0.0481
Parametric Equivalent
AT24C64A-10PI-2.7
Microchip Technology
2202
AT24C64A-10PI-2.7-DG
0.0481
MFR Recommended
BR24G64-3A
Rohm Semiconductor
1024
BR24G64-3A-DG
0.0481
Similar
BR24L64-W
Rohm Semiconductor
2739
BR24L64-W-DG
0.0481
Similar

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de desembre 02, 2025
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de desembre 02, 2025
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Frequently Asked Questions (FAQ)

Can the 24LC64-I/P be safely used in a 3.3V system that occasionally experiences 5V I2C bus voltage spikes, and what protection measures are recommended to avoid damage during long-term operation?

The 24LC64-I/P supports a supply voltage range of 2.5V to 5.5V, but its I/O pins are not 5V-tolerant when powered at 3.3V. If your 3.3V system interfaces with a 5V I2C bus—common in mixed-voltage designs—voltage spikes can exceed the absolute maximum ratings and degrade or damage the device over time. To mitigate this risk, use a bidirectional level shifter (e.g., TXB0104 or PCA9306) between the MCU and the 24LC64-I/P, or ensure the 5V master uses open-drain buffers with pull-ups to 3.3V. Alternatively, power the 24LC64-I/P from 5V if system logic allows, enabling native 5V tolerance on SDA/SCL lines.

Is it safe to replace a Microchip 24LC64-I/P with a compatible EEPROM like the STMicroelectronics M24C64-DRCS6TP/K in a legacy industrial control board without firmware changes?

While the M24C64-DRCS6TP/K shares nearly identical electrical and timing characteristics with the 24LC64-I/P—including 64Kbit density, I2C interface, and 400 kHz clock support—there are subtle differences that may affect drop-in compatibility. The M24C64 has a slightly faster write cycle (max 3 ms vs. 5 ms) and different block protection register behavior. More critically, its I2C device address defaults may differ based on A0–A2 pin states. Verify that your firmware does not hardcode assumptions about write-protect behavior or acknowledge polling timing. Always test under full operational temperature ranges (-40°C to 85°C), as timing margins can shift, especially during page writes.

What are the real-world reliability risks of using the 24LC64-I/P in an automotive under-hood application where ambient temperatures regularly exceed 80°C, and how can data retention be ensured over a 10-year lifespan?

Although the 24LC64-I/P is rated for -40°C to 85°C operation, sustained exposure near the upper limit accelerates charge leakage in the floating gate cells, potentially reducing data retention below the specified 200 years (at 25°C). At 85°C, retention may drop to ~10 years or less depending on write frequency and process variation. To ensure 10-year reliability in high-temperature environments, implement periodic background refresh (read-verify-rewrite every 6–12 months) for critical data, minimize unnecessary writes, and consider adding ECC if storing calibration or safety-critical parameters. Also, ensure proper PCB layout with adequate thermal relief and avoid placing the 24LC64-I/P near heat-generating components.

How does the page write buffer behavior of the 24LC64-I/P impact system design when updating multiple non-contiguous bytes, and what pitfalls should be avoided to prevent data corruption?

The 24LC64-I/P supports 32-byte page writes, but writing across page boundaries (e.g., starting at address 0x1F and writing 4 bytes) will wrap within the same page, potentially corrupting adjacent data. This is a common source of silent data corruption in firmware that assumes linear addressing. Always align multi-byte updates to 32-byte page boundaries or split writes into separate transactions. Additionally, the 5 ms write cycle time applies per page—not per byte—so batching writes improves efficiency, but interrupting a write (e.g., via power loss) can leave the entire page in an undefined state. Use a write-in-progress (WIP) polling routine via I2C ACK checking to confirm completion before proceeding.

Can the 24LC64-I/P be shared on the same I2C bus with other EEPROMs like the 24AA02E48 (with built-in EUI-48 MAC) without address conflicts, and what pull-up resistor values are optimal for reliable 400 kHz communication in a noisy industrial environment?

Yes, the 24LC64-I/P can coexist on the same I2C bus with the 24AA02E48, provided their hardware address pins (A0–A2) are configured to unique values. The 24LC64-I/P uses a 7-bit base address of 0x50–0x57 (depending on A0–A2), while the 24AA02E48 typically uses 0x50–0x53 but reserves certain addresses for MAC read operations—verify the specific variant’s datasheet. For reliable 400 kHz operation in electrically noisy environments (e.g., motor controls), use 2.2 kΩ pull-up resistors on SDA and SCL lines to balance rise time and noise immunity. Keep trace lengths short (<30 cm), add 100 pF capacitors to ground near the 24LC64-I/P pins if ringing occurs, and consider using I2C bus buffers (e.g., P82B715) for longer buses to maintain signal integrity.

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